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Micron and CXL: OCP Summit Update

CXL is poised to revolutionize the datacenter. It is real and it is happening now! Micron is in the unique position to deliver CXL solutions in multiple categories to obtain the desired outcomes that CXL enables. The resources and wide memory and storage portfolio Micron has to offer reflects their industry experience and vision; together it creates a synergy for the CXL solutions being brought to market. If you will explore the problems CXL attempts to solve, the likelihood of the solution being a Micron-enabled option will seem logical. 

What is CXL?

Compute Express Link™ (CXL™) is an industry-supported cache-coherent interconnect. CXL allows for the enablement of a disaggregated and composable datacenter. This modern interconnect will extend the server resources beyond the confines of a single form factor. CXL is based on PCI physical and electrical interface, but unlike past interconnects, it will address the composability and performance characteristics required for the category of compute resources being extended. 

Cache-coherent, multi-point sharing and expansion are addressed with CXL. CXL is different from legacy expansion because at its core is cache-coherency for all the expanded resources. Limitations of a single form factor are no longer a concern, instead high-speed interconnections are enabling resources to be made available sans the limitations of form factor like power, heat, space. 

The enablement of CXL will drive innovative compute design adoptions, not at the motherboard level, but it will open the motherboard to include rack design elements. An adjacent rack with all the available resources of more power and more heating and cooling options will be part of the new composable server footprint. Compute with CXL will be more than agile; it will enable pliability and you will not be hindered by a system CPU designed 10 years ago. CXL provides a clear and open standard that the entire industry is supporting to unlock innovation.

How can CXL Help?

CXL will shift memory as it is now, in terms on how it is consumed. It will enable the next revolution in datacenter computing and Micron is poised to be a part of this. Micron is a US-based memory developer, manufacturer, and supplier with fabrication plants in the US. 

Micron has announced expansion plans worth $15 Billion in Boise, ID and $100 Billion in Clay, NY. Micron is not sitting still. But what problem are they trying to solve? Compute is becoming denser as a two-socket system. It is not defined by the number of sockets but the number of cores available to each socket. That compute density inherently poses the problem of how much denser RAM must be and how much faster is needs to be. DDR5 attempts to address capacity and bandwidth, with more memory channels. The current trends show CPU development is outpacing DRAM, but the cost of stacking DRAM drives the TCO cost to be a very expensive option. Enter CXL.

CXL + Micron = What A Combo!

The combination of CXL and Micron technologies are unlocking the much-needed expansion without the inherent penalty of performance loss. Current options of memory stacking make the linear cost-per-bit impossible. Current system memory (RAM) is 40 to 50% of the material cost of a server and the need for memory intensive workloads is not going away. Use cases like AI/ML demand more performance and that includes RAM.  

CXL allows for memory to be a pooled resource on the PCI bus via CXL.  A lower TCO versus costly TSV (Through Silicon Vias)— traditional wire bond that will ensure 40 to 100 Mega transfers per second. CXL while a little bit slower than DDR5 is still cache coherent. Cache coherence defines the behavior of reads and writes to a single address location and this is very important for the integrity of computation across multiple CPU and shared resources. Leveraging the PCI bus, CXL provides for resources to be available further away from the CPU and memory bus without performance penalty.  

Other areas of computing alternatives can also be addressed head-on with CXL. For example, the system motherboard and channel bus limitations. The traditional Two DIMMS Per Channel (TDPC) ratio is channeled by incorporating more memory than was possible before. System complexity and balanced memory systems vs CPU is addressed. GPUs can be leveraged more effectively across multiple systems. These current challenges are addressed with the advent of CXL as a rapidly maturing option. 

Conclusion

Micron’s fabrication of memory (DRAM) and other CXL attached memory products will contribute to the next generation of computing. At the OCP Summit, Micron presented its position in the CXL revolution and value proposition to solve the challenges of modern datacenter computing. 

At the OCP Summit Industry Interest in CXL was very strong. Hyperscalers and more. 

The call to action is in front of us today: Be Prepared. CXL is alive, real and shipping. Future designs will leverage the benefits provided by CXL. The echoing message of TCO being lower will have to be vetted, as alternatives are constantly being challenged by supply change and physical limitations of current technology options. I look forward to innovative and future designs that incorporate CXL, and to seeing how existing technologies will incorporate CXL. Consider HCI and SSD supercharged with CXL. What will a single HCI compute be composed of? How will it easily be recomposed with CXL? What hasn’t been discussed, is how the hypervisor giant, VMware, will leverage the CXL advantage? The race of software development to catchup to hardware development and vice versa continues. Either way Micron will be there to drive the desired outcomes. Will you be ready?

If you want to learn more about what Micron is doing, Check out their Tech Field Day presentations. Micron Technology’s Ryan Baxter also guested on our Utilizing CXL Podcast, part of our Utilizing Tech series. Watch his episode to hear more on Micron’s CXL efforts. If you want to learn more about what Micron is doing, you can also check out their Tech Field Day presentations.

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Vuong Pham

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